[eagle] Eagle 10 MHz Clock
bill at hsmicrowave.com
Mon Apr 9 19:55:31 PDT 2007
Some very good dialog has been taking place, lead by Juan Rivera as he
heads up the prototype U Receiver build and test project.
Several very important questions have been raised but I'd like to
address just one with this post.
I've volunteered to design and build the S2 Receiver and the C
Transmitter and support microwave component efforts on the phased array
for each. I am finishing efforts on a "prototype" single channel
(assuming there might be several) S2 downconverter.
I fully recognize than "many" system design parameters have not yet been
defined but I'm trying to get that "definition" effort moving along.
This is the first one I'd like to address.
In the coarse of designing the LO for the "prototype" S2 downconverter I
have not been too concerned with use of the 10 MHz satellite clock. But
I think it's time for "system" project guidelines to be developed for
this issue since it can affect the design of all LO's. I have looked for
guidance on the subject in Eaglepedia and have come up short. Point me
in the right direction if it's there (and I just couldn't find it).
I hope I'm not rehashing old discussions (I've only been on the team
since last October) but here are my questions:
1) What is the reason for requiring all LO's to be locked to a 10 MHz
satellite system clock or are they?
2) Have the performance specifications for the 10 MHz clock been
developed and what are they (in particular phase noise, frequency
stability, susceptibility to digital hash, and power level available to
each using subsystem - to name a few)?
My apologies for sending to the entire Eagle list but I'm not sure who
has the responsibility for the clock.
Probably more questions to follow!!!
Regards...Bill - N6GHz
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