[eagle] Re: Eagle Microwave Antenna Arrays -- RF concepts
antonio at qualcomm.com
Mon Apr 2 14:56:39 PDT 2007
At 11:30 AM 4/2/2007, Alan Bloom wrote:
>The other issue is that the phase shifter needs a full 360-degree
>range. It would be easy to do at the reference frequency with an NCO.
It is easy to get full 360 degree phase control. You just buy this
chip that does it.
It is also possible to put the phase shifter before the PLL, in which
case you do not need 360 degree phase control, but 360/n where n is
the PLL multiplication factor.
>Good phase noise shouldn't be too hard. With a high reference frequency
>you can use a wide loop bandwidth and basically get the same phase noise
>as the reference +20log(Frf/Fref).
Yep. There are a couple of issues here. I would do the data
modulation after the PLL, although it can be done either way. If the
data modulation is done before the PLL, you would want the PLL
bandwidth to be many times wider than the modulation, because you
want the PLL output phase to change in a small fraction of a
modulation symbol time. (The numbers might work out ok.) If you put
the modulation after the PLL then the modulation puts no constraint
on the PLL loop bandwidth. Why would you care? Well because if we
have a 1 Msymbol/sec modulation, and you want the phase to change in
less than 1/10th of a modulation symbol, then you might choose a PLL
bandwidth 20x the modulation rate, which would get you to 20MHz, but
if the reference frequency of the PLL is only 100 MHz, and you want
the bandwidth of the PLL to be a small fraction of the reference
frequency (sampling issue) then you're already stuck with limited
choices. Might work ok, but its not like there's a lot of room, but
you'd need more careful analysis. I prefer an approach with a lot of
room, and easy analysis, so I was preferring the modulation after the
As for phase noise, as long as the PLL loop bandwidth is wider than
the modulation, then the phase noise THAT MATTERS (ie the phase noise
within the modulation bandwidth) will be controlled by the reference,
not the VCO in the PLL.
I forget what our modulation symbol rate was gonna be. Suppose it is
1 Msymbol/second. Then the loop bandwidth needs to be wider than
about 1 MHz to ensure that the phase noise is dominated by the
reference, and that seems trivially easy to accomplish. Hey, you can
throw a factor of 2 or 3 in there for good measure. A 3 MHz loop
bandwidth works out fine with a 100 MHz reference frequency, as that's 33:1.
So phase noise would seem to be not a problem. You can use cheap
VCOs. The loops are wide enough to make 'em track the reference.
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